1. Field of the Invention
The present invention relates to a charge pump circuit employed for an electronic device and the like.
2. Description of the Related Art
An existing electronic device includes a plurality of ICs in order to realize a function thereof. The ICs are driven at different voltages, so that a plurality of voltages different from a power source voltage are required. Up to now, the plurality of voltages are generated by a switching regulator or a charge pump circuit.
The switching regulator has high power efficiency. However, there is a disadvantage in that a harmonic noise is caused at the time of current switching, so that it is necessary to use a shielded power source circuit. In addition, a coil is required as an external part, with the result that the switching regulator is not suitable for a small electronic device.
On the other hand, the charge pump circuit can generate a high voltage with a low noise. However, there is a disadvantage in that power efficiency is low, so that the charge pump circuit is not suitable as a power source circuit for a mobile device in which the power efficiency is set at the highest priority. Therefore, if a charge pump circuit having high power efficiency can be realized, the charge pump circuit becomes a power source most suitable for a small mobile device.
In a fundamental charge pump circuit, diodes are used as charge transfer elements and a charge is successively transferred to a next stage to increase a voltage. In contrast to this, in a charge pump circuit mounted on a MOS integrated circuit, MOSFETs instead of the diodes are used as the charge transfer elements because of adaptability to a process. However, in the charge pump circuit using the MOSFETs as the charge transfer elements, a threshold voltage Vth of each of the MOSFETs is increased by the effect of a substrate used for the charge pump circuit, with the result that the power efficiency reduces as the number of stages increases. Therefore, there has been proposed a charge pump circuit in which a voltage loss caused by the threshold voltage Vth of each of charge transfer MOSFETs is reduced to improve the power efficiency (for example, see JP 2002-233134 A).
FIG. 4 is a circuit diagram showing a conventional charge pump circuit using charge transfer MOSFETs.
The conventional charge pump circuit using charge transfer MOSFETs includes N-type MOSFETs 700 to 703 in each of which a source thereof is connected with a substrate thereof, coupling capacitors 710 to 712 each of which is connected with a drain of corresponding one of the N-type MOSFETs 700 to 703, a clock generating circuit 730, and reverse level shifting circuits 720 to 723 for converting clock signals outputted from the clock generating circuit 730 into voltages and transferring the voltages to corresponding gates of the N-type MOSFETs 700 to 703. A connection point between the N-type MOSFETs 702 and 703 is connected with a Dickson charge pump circuit including two N-type MOSFETs 704 and 705 and two coupling capacitors 713 and 714 (hereinafter referred to as a “branch charge pump circuit 733”). A power source terminal, which is located on a low-potential side, of each of the reverse level shifting circuits 720 to 723 is connected with the source of one of the N-type MOSFETs 700 to 703 which is provided in a corresponding stage. A power source terminal, which is located on a high-potential side, of each of the reverse level shifting circuits 720 and 721 is connected with the source of one of the N-type MOSFETs 702 and 703 which is provided in a second next stage.
The reverse level shifting circuit 720 outputs a voltage V2 to the gate of the N-type MOSFET 700 when a clock pulse CLK′ is an L-level, so that the N-type MOSFET 700 becomes an on state. When the clock pulse CLK′ is an H-level, the reverse level shifting circuit 720 outputs a voltage Vdd to the gate of the N-type MOSFET 700, so that the N-type MOSFET 700 becomes an off state. Similarly, each of the reverse level shifting circuits shifts levels of the clock pulse CLK′ and a clock pulse CLKB′ and supplies a corresponding voltage to the gate of each of the N-type MOSFETs.
Next, a boosting operation of the charge pump circuit which is in a steady state will be described. When each of the N-type MOSFETs 700 and 702 is in an on state (CLK′=L-level), V1=Vdd, V2=3 Vdd, and V3=3 Vdd. In the branch charge pump circuit 733, (V4=5 Vdd−Vth) and (V5=5 Vdd−2 Vth). Here, Vth denotes a threshold voltage of each of the N-type MOSFETs 704 and 705.
On the other hand, when each of the N-type MOSFETs 701 and 703 is turned on (CLKB′=L), V1=2 Vdd, V2=2 Vdd, and V3=4 Vdd. In the branch charge pump circuit 733, (V4=4 Vdd−Vth) and (V5=6 Vdd−2 Vth).
As described above, an absolute value of Vgs at the time when each of the N-type MOSFETs is turned on becomes substantially the same value (2 Vdd) and the absolute value of Vgs at the time when each of the N-type MOSFETs is turned off becomes 0 V. Therefore, Vgs is a high voltage, so that an on-resistance of each of the N-type MOSFETS reduces. Thus, a high-efficiency charge pump circuit having a large output current capacity can be realized.
However, the level shifting circuit is used for the conventional charge pump circuit using the charge transfer MOSFETs, so that the current consumption of the charge pump circuit is increased by the current consumption of the level shifting circuit and a through current flows at the time when an output of the level shifting circuit is reversed. Therefore, the level shifting circuit hinders the improvement of boosting efficiency.
A level shifting circuit generates a voltage to be applied to the gate of a charge transfer MOSFET based on a potential caused in a second next stage. Therefore, there is a problem in that it takes a long time to obtain a stable state after a power source voltage is applied.